說明

• AD9549A/PCBZ, Evaluation Board for the AD9549A provides synchronization for many systems, including synchronous optical networks (SONET/SDH). The AD9549A generates an output clock, synchronized to one of two external input references of 8 kHz to 750 MHz. The external references may contain significant time jitter, also specified as phase noise. Using a digitally controlled loop and holdover circuitry, the AD9549 continues to generate a clean (low jitter), valid output clock during a loss of reference condition, even when both references have failed