ADP7118UJ-EVALZ，用于評估 ADP7118 20V、200mA 低噪聲 CMOS LDO 的評估板。 ADP7118評估板用于演示ADP7118系列
線性穩(wěn)壓器的功能。只需單個
電壓源、
電壓表、
電流表和
負載電阻即可演示簡單的設備測量，例如線路和負載調節(jié)、壓差和接地電流
說明
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ADP7118UJ-EVALZ, Evaluation Board for Evaluating the ADP7118 20V, 200mA Low Noise, CMOS LDOs. The ADP7118 evaluation board is used to demonstrate the functionality of the ADP7118 series of linear regulators. Simple device measurements such as line and load regulation, dropout and ground current can be demonstrated with just a single voltage source, a voltmeter, an ammeter and load resistors
主要特色
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Conversion Type
DC to DC
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Input Voltage
2.7 to 20 V
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Output Current
0.2 A
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Topology
LDO
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